Digilent Udviklingskort Arty Z7-20 APSoC Zynq-7000

Arty Z7-20 er en udviklingsplatform, der er designet omkring Xilinx Zynq-7000™ All Programmable System-on-Chip (AP SoC). Zynq-7000 arkitekturen integrerer en dual-core, 650 MHz ARM Cortex-A9 processor med Artix-7 seriens FPGA-logik. Dette par omgiver en kraftig processor med et unikt sæt af softwaredefinerede enheder og kontrollere. Værktøjssættene Vivado, Petalinux og SDSoC byder hver især på en vej fra definition af dine brugerdefinerede ydre enheder og til levering af deres funktionalitet op til et Linux OS- eller "bare-metal'-program, der kører på processoren.

• Processor: 650MHz dual ARM Cortex-A9 core
• Opslagstabeller (LUT'er): 53200
Flip-flops: 106400
• Blok-RAM: 630 KB
• Urstyringsruder: 4
• Tilgængelig skærm-I/O: 49
• DDR3 hukommelseskontroller med 8 x DMA-kanaler og 4 x AXI3 slaveporte
• Periferikontrollere med høj båndbredde: 1G Ethernet, USB 2.0, SDIO
• Periferikontroller med lav båndbredde: SPI, UART, CAN, I²C
• Programmerbar fra JTAG, Quad-SPI Flash eller microSD-kort
• Programmerbar logik svarende til Artix-7 FPGA hukommelse

• På kortet IS43TR16256A-125KBL 512MB DDR3 SDRAM med 16-bit bus ved 1050 Mbps
• På kortet S25FL128S 16 MB Quad-SPI Flash med 48-bit unik EUI-48/64™-kompatibel identifikator
• microSD-kortstikplads
• Strømforsynes via USB eller +7 V til +15 V dc via cylindrisk jack

• 10/100/1000 Ethernet via RJ45 stik
• USB-UART bro via micro-B fatning
• USB-JTAG programmering via micro-B fatning
• USB OTG PHY (understøtter kun vært) via USB-A fatning

• HDMI-strømoptag (indgang)
• HDMI-kildeport (udgang)
• PWM-drevet mono audio-udgang via 3,5 mm jackfatning

• Nulstillings- og programtrykknapper
• 4 x brugertrykknapper
• 2 x brugerskydekontakter
• 4 x brugerlysdioder
• 2 x brugerlysdioder, RGB

• chipKIT/Arduino R3 skærm-stiftlister
• 2 x 12-bens Pmod™-standardkonnektorer

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An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.