5PB1104PGGI8, Clockbuffer, 8 ben, TSSOP

The Renesas Electronics high performance CMOS clock buffer family of devices. It has an additive phase jitter of 50fs RMS. There are five different fan out variations available from 1 ratio 2 to 1 ratio 10. It supports a synchronous glitch free output enable function to eliminate any potential intermediate incorrect output clock cycles when enabling or disabling outputs. It can operate from a 1.8V to 3.3V supply.

Very low pin to pin skew
Very low additive jitter
Integrated serial termination for 50 ohm channel